PURPOSE: To make it possible to manufacture an integrated circuit device having excellent performance readily, by simultaneously forming a semiconductor layer for an SOI structure and a semiconductor layer used for a bipolar transistor element on a semiconductor substrate.
CONSTITUTION: A semiconductor layer 4 used for an FET element on an insulating film 2 and a semiconductor layer 4 used for a bipolar transistor element on a semiconductor substrate 1 at an opening part 3 in the insulating film 2 are simultaneously deposited. Both layers are made to be a single crystal. Before the deposition of the semiconductor layer 4, impurities are introduced through the opening part 3 of the insulating film. Thus an embedded and diffused layer 11 of the bipolar transistor element is formed. Therefore, the deep embedded and diffused layer 11 of the bipolar element can be readily formed. At the same time the semiconductor layer 4 on the layer 11 is dissolved and recrystallized, impurities are diffused in the semiconductor layer 4, and a collector region can be formed. By using this substrate, the impurity diffused regions of FETs 20, 30 and 40, a bipolar element 10 and the like can be performed in parallel. The integrated circuit device, in which characteristics of both elements are fully utilized can be readily manufactured.
JP5092313 | Manufacturing method of semiconductor devices |
JP2001308319 | INSULATED GATE COMPOUND SEMICONDUCTOR DEVICE |
JP2024054272 | semiconductor equipment |
JPS6199365A | 1986-05-17 |
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