MANUFACTURE OF SEMICONDUCTOR PACKAGE - SHINKO ELECTRIC IND CO

Title:

MANUFACTURE OF SEMICONDUCTOR PACKAGE

Document Type and Number:

Japanese Patent JPH10223800

Kind Code:

A

Abstract:

To make a through hole having heat shock resistance without sacrifice of workability by subjecting a through hole to nickel plating while closing a cavity part with a circuit board for outer layer.

An opening for forming a cavity 16 is made in a resin board which is then subjected to etching to obtain a circuit board 20a for inner layer having an inner wiring pattern 18 on the surface. A circuit board 20b for outer layer having no opening is then sandwiched by the circuit boards 20a for inner layer to produce a laminate. A through hole 45 is made through the laminate and the inner wall face thereof is subjected to copper plating 46. Subsequently, an outer wiring pattern is formed on the outer surface of the circuit board 20b for outer layer. Thereafter, an opening is made in the circuit board 20b for outer layer in order to form a cavity 16 and the inner wiring pattern 18 in the cavity 16 is subjected to nickel plating and gold plating. Finally, the through hole is subjected to nickel plating 58 while closing the cavity 16 part with the circuit board 20b for outer layer.

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Inventors:

KURAISHI FUMIO
YODA TOSHIHISA
SHIMIZU MITSUHARU

Application Number:

JP2772597A

Publication Date:

August 21, 1998

Filing Date:

February 12, 1997

Export Citation:

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Assignee:

SHINKO ELECTRIC IND CO

International Classes:

H05K3/46; H01L21/48; H01L23/057; H01L23/12; H01L23/498; H05K3/24; (IPC1-7): H01L23/12; H05K3/46

Attorney, Agent or Firm:

Takao Watanuki (1 outside)

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