Title:
MANUFACTURE OF SEMICONDUCTOR WAFER
Document Type and Number:
Japanese Patent JP3658454
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor wafer which can reduce the polishing time of a surface-ground wafer and efficiently manufacture a semiconductor wafer.
SOLUTION: By slicing an ingot, a wafer is obtained. Both cut surfaces of the sliced wafer is subjected to surface grinding. The surface-ground wafer is etched by using alkaline solution. The periperal part of the etched wafer is beveled. Both surfaces of the beveled wafer are polished and mirror-finished. The wafer both surfaces of which are polished is cleaned, and particles or the like stuck on the surfaces are eliminated. The cleaned wafer is dried, and a semiconductor wafer is obtained.
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Inventors:
Ichibun
Toshiharu Sashiya
Toshiharu Sashiya
Application Number:
JP11291596A
Publication Date:
June 08, 2005
Filing Date:
March 29, 1996
Export Citation:
Assignee:
Komatsu Electronic Metal Co., Ltd.
International Classes:
B24B9/06; B28D5/00; H01L21/00; H01L21/304; H01L21/306; (IPC1-7): H01L21/304; H01L21/306
Domestic Patent References:
| JP4226031A | ||||
| JP4330726A | ||||
| JP4346429A | ||||
| JP6084856A | ||||
| JP6349795A | ||||
| JP8064560A | ||||
| JP8066850A | ||||
| JP9115864A |
Attorney, Agent or Firm:
Kinoshita Minoru
Kanji Nakayama
Tsuyoshi Ishizaki
Akira Eto
Kanji Nakayama
Tsuyoshi Ishizaki
Akira Eto