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Patent Searching and Data


Title:
MANUFACTURE OF SEMICONDUCTOR
Document Type and Number:
Japanese Patent JPS6189679
Kind Code:
A
Abstract:

PURPOSE: To attempt simplification in manufascturing processes by eliminating a process for putting masks together and obtain an FET prevented from contami nation applied to the surface of a substrate by forming an insualting layer all over the whole surface on a semiconductor substrate and an opening slightly larger than that of the mask using the insulating layer.

CONSTITUTION: An insulating layer 12 is formed on the whole surface of a semiconductor substrate 11, a regist mask 14 is formed on said layer and then an opening part 15E slightly larger than an opening 13 in the regist mask 14 is formed in the insulating layer 12 by selective etching. Next, after a first conduction-type impurity is introduced through the opening 13 in the regist mask 14 to form a channel region 16E in the main surface of the substrate 11, Schottky gate metal 21 transversing the channel region 16E is formed at the center of the channel region 16E. Next, a high density impurity is introduced into the channel region using the insulating layer 12 and the Schottky gate metal 21 as a mask to form a source region 23S and a drain region 23D. Next, after an SiO2 layer 25 is formed on the whole surface, a source electrode 27S, a drain electrode 27D and a gate electrode 21' are formed.


Inventors:
TAKAKUWA HIDEMI
TAKAKASHI HIROSHI
FUTAKI MAKOTO
Application Number:
JP21183884A
Publication Date:
May 07, 1986
Filing Date:
October 09, 1984
Export Citation:
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Assignee:
SONY CORP
International Classes:
H01L29/812; H01L21/338; H01L29/80; (IPC1-7): H01L29/80
Attorney, Agent or Firm:
Sada Ito