Title:
半導体装置の製造方法
Document Type and Number:
Japanese Patent JP7058780
Kind Code:
B2
Abstract:
To improve the flatness of a surface electrode in a semiconductor device having a gate structure without increasing the number of steps.SOLUTION: In a manufacturing method of a semiconductor device according to the present disclosure, a plurality of gate structures are discretely formed on a first main surface (1A) of a semiconductor substrate (1), a plurality of gate interlayer films (5) covering the plurality of gate structures of the semiconductor substrate (1) are discretely formed, a first surface electrode (6) which is thinner than the plurality of gate interlayer films (5) is placed on the first main surface (1A) of the semiconductor substrate (1) between the plurality of gate interlayer films (5) and the plurality of gate interlayer films (5), and a second surface electrode (7) is formed on the upper surface of the first surface electrode (6) by plating.SELECTED DRAWING: Figure 7
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Inventors:
Tomohito Kudo
Application Number:
JP2021041022A
Publication Date:
April 22, 2022
Filing Date:
March 15, 2021
Export Citation:
Assignee:
Mitsubishi Electric Corporation
International Classes:
H01L21/28; H01L29/417; H01L21/288; H01L21/3205; H01L21/768; H01L23/522; H01L23/532; H01L29/423; H01L29/49
Domestic Patent References:
| JP2017147433A | ||||
| JP2005079462A | ||||
| JP2016119393A |
Attorney, Agent or Firm:
Hidetoshi Yoshitake
Takahiro Arita
Takahiro Arita
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