Title:
半導体装置の製造方法
Document Type and Number:
Japanese Patent JP4537834
Kind Code:
B2
Abstract:
Disclosed are a semiconductor wafer, a semiconductor device, and a method of manufacturing the semiconductor device, which are capable of easily carrying out an alignment between a semiconductor substrate and an electron beam exposure apparatus. There is provided a method including steps of: forming an interlayer insulating film 25 on a gate electrode 17 a and a conductive film 17 , as well as in a first opening 17 b; forming in the interlayer insulating film 25 a second opening 25 a including the first opening 17 b; forming a hole 14 a in an element isolation insulating film 14 under the first opening 17 b; by use of the first opening 17 b and the hole 14 a as an alignment mark 27 used for the alignment in a state where a resist 28 is applied, measuring an intensity of a reflected electron EBref from the alignment mark 27 , thus aligning the electron beam exposure apparatus with the semiconductor substrate 10 ; exposing with an electron beam EB the resist 28 existing in a hole formation region of a first region I; and developing the resist 28 to make a resist pattern 28 e.
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Inventors:
Ryuji Maruyama
Application Number:
JP2004332345A
Publication Date:
September 08, 2010
Filing Date:
November 16, 2004
Export Citation:
Assignee:
Fujitsu Semiconductor Limited
International Classes:
H01L21/02; G03F7/20; G03F7/207; H01L21/027
Domestic Patent References:
| JP2000012432A | ||||
| JP3138920A | ||||
| JP2002075819A | ||||
| JP11330381A | ||||
| JP3034423A | ||||
| JP6252025A | ||||
| JP9283412A |
Foreign References:
| WO2001067509A1 |
Attorney, Agent or Firm:
Keizo Okamoto