MANUFACTURING METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

Title:

MANUFACTURING METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

Document Type and Number:

Japanese Patent JP2005294843

Kind Code:

A

Abstract:

To reduce contamination of a substrate due to an oxide of high melting point metal constituting a part of a polymetal gate in a film formation process of a nitride silicon film.

When a nitride silicon film 11 is formed on gate electrodes 7A, 7B, and 7C including a tungsten film, an atmosphere within a chamber of a CVD device is made to reduce an oxide of W, and while supplying ammonia in the chamber, the temperature of a wafer 1 is raised at 600°C or more. Next, the ammonia and mono silane are supplied in the chamber, and a nitride silicon film 11 is deposited by causing such gases to be reacted. Next, the supply of the silane is stopped and the temperature of the wafer 1 is lowered to 400°C while supplying only the ammonia in the chamber. Thereafter, the gas in the chamber is replaced with nitrogen, and the wafer is unloaded.

Inventors:

YAMAMOTO NAOKI
UCHIYAMA HIROYUKI
SUZUKI NORIO
NISHITANI EISUKE
KIMURA SHINICHIRO
HOZAWA KAZUYUKI

Application Number:

JP2005104583A

Publication Date:

October 20, 2005

Filing Date:

March 31, 2005

Export Citation:

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Assignee:

RENESAS TECH CORP

International Classes:

H01L29/423; H01L21/318; H01L21/768; H01L21/8234; H01L21/8242; H01L21/8247; H01L27/088; H01L27/108; H01L27/115; H01L29/49; H01L29/78; H01L29/788; H01L29/792; (IPC1-7): H01L21/8234; H01L21/318; H01L21/768; H01L21/8242; H01L21/8247; H01L27/088; H01L27/108; H01L27/115; H01L29/423; H01L29/49; H01L29/78; H01L29/788; H01L29/792

Attorney, Agent or Firm:

Yamato Tsutsui

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