Title:
MATCHED PAIR TRANSISTOR CIRCUITS
Document Type and Number:
Japanese Patent JP2016122019
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To provide an array of sensors arranged in matched pairs of transistors with an output formed on a first transistor and a sensor formed on the second transistor of the matched pair.SOLUTION: Each matched pairs is arranged such that a second transistor of the matched pair is read through an output of a first transistor of the matched pair. The first transistor of the matched pair is forced into a saturation (active) region to prevent interference of the second transistor on the output of the first transistor. A sample is taken of the output. The first transistor is then operated in a linear region, allowing the sensor formed on the second transistor to be read through the output of the first transistor. A sample is taken from the output of a sensor reading of the second transistor. A difference is formed of the two samples.SELECTED DRAWING: Figure 1
More Like This:
Inventors:
KEITH GLEN FIFE
Application Number:
JP2016073985A
Publication Date:
July 07, 2016
Filing Date:
April 01, 2016
Export Citation:
Assignee:
LIFE TECHNOLOGIES CORP
International Classes:
G01N27/414
Domestic Patent References:
JPH11266404A | 1999-09-28 | |||
JP2008215974A | 2008-09-18 | |||
JP2010022063A | 2010-01-28 | |||
JP2009047688A | 2009-03-05 | |||
JP2012506557A | 2012-03-15 |
Foreign References:
WO2008007716A1 | 2008-01-17 | |||
US20050230245A1 | 2005-10-20 |
Attorney, Agent or Firm:
Hatsushi Shimizu
Masao Haruna
Hirotaka Yamaguchi
Toshi Gobe
Ryuichi Inoue
Toshimitsu Sato
Koichi Niimi
Tomohiko Kobayashi
Masato Ozeki
Yoshihiro Igarashi
Kazuya Kawamoto
Masao Haruna
Hirotaka Yamaguchi
Toshi Gobe
Ryuichi Inoue
Toshimitsu Sato
Koichi Niimi
Tomohiko Kobayashi
Masato Ozeki
Yoshihiro Igarashi
Kazuya Kawamoto
Previous Patent: APPARATUS AND METHODS FOR ALIQUOTTING FROZEN SAMPLES
Next Patent: TRANSFORMER NOISE PREDICTION METHOD
Next Patent: TRANSFORMER NOISE PREDICTION METHOD