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Title:
アドレスされた構成部分の思索の失敗を検出するメモリ・コントローラ
Document Type and Number:
Japanese Patent JP3615770
Kind Code:
B2
Abstract:
A memory controller for a microprocessor including apparatus to both detect a failure of speculation on the nature of the memory being addressed, and apparatus to recover from such failures.

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Inventors:
Kelly, Edmund Jay
Kmerick, Robert Ef
Wing, Malcolm John
Application Number:
JP51207399A
Publication Date:
February 02, 2005
Filing Date:
August 11, 1997
Export Citation:
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Assignee:
Transmeta Corporation
International Classes:
G06F9/38; C09K8/34; G06F9/30; G06F9/318; G06F9/455; G06F11/00; G06F11/14; G06F11/28; G06F12/02; G06F12/10; (IPC1-7): G06F9/38; G06F9/30
Domestic Patent References:
JP7505242A
JP5363820A
JP3269628A
JP57196356A
Attorney, Agent or Firm:
Kazuo Shamoto
Shosuke Imai
Tadashi Masui
Tadahiko Kurita
Yasushi Kobayashi