PURPOSE: To restrain disturbance between adjacent cells by storing one data bit into respective cells, storing bits from plural data bytes into lines of the cell and storing individual bits from various bytes with the pair of adjacent cells.
CONSTITUTION: This device is an array 39 arranged many memory cells 70 in rows and columns, and respective memory cells 70 are an insulating gate type n-channel field effect transistor. The control gate of respective transistors 70 in one row is connected to one of rows 61, and slightly doped source regions of respective transistors 70 are connected to columns 75 and drain regions are connected to columns 76, respectively. And data bits are stored into respective memory cells 70, bits from plural data bytes are stored into rows of memory cell 70 in accordance with the pattern in which different bits from different bytes are stored with the pair of adjacent memory cells 70. By this way, the mutual disturbance between adjacent cells 70 is substantially removed.
GUREGORII II ATOUTSUDO
RUBIN WAI JII
