To provide a memory device having a structure which is easily and stably manufactured in a good condition.
The memory device 10 is configured in such a way that a memory layer 3 made of an oxide, and an ion source layer 4 containing any one selected from elements Cu, Ag and Zn are laminated and formed between a lower electrode 1 and an upper electrode 6, the memory layer 3 and the ion source layer 4 are electrically connected to the lower electrode 1 and the upper electrode 6 through a contact hole made of an opening formed on an insulating layer 2 of the lower electrode 1, the opening of the insulating layer 2 is formed to be wider in the lower electrode 1 side than in the upper electrode 6 side, and the memory layer 3 and the ion source layer 4 are formed continuously over the inside of the contact hole and the insulating layer 2.
COPYRIGHT: (C)2008,JPO&INPIT
SONE TAKESHI
OBA KAZUHIRO
NARISAWA KOSUKE
JP2005044848A | 2005-02-17 | |||
JPH02194554A | 1990-08-01 | |||
JP2006040946A | 2006-02-09 | |||
JP2004342843A | 2004-12-02 |
Hitoshi Ito
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