PURPOSE: To enable to test an alternate control system, by using bit address corresponding to bits which are essentially not used, in a memory device providing an alternate memory.

CONSTITUTION: In a memory device consisting mainly of a memory array 6 of n- word × m-bit, alternate bit memory 7 provided as a substitute of error of this memory array 6, and address register designating the bit location of m+1-bits or more, an arbitrary bit location of m+1-bit or more is set to an alternate control register 1 and this bit location is decoded with an alternate bit decoder 2 for selection. The reciprocal of the logic of the specified bit of the memory array is written in the alternate bit memory 7 being the selected bit location. The test for alternate control system for write-in/readout data multiplexers 3, 5 and the like is performed by reading out the data.