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Patent Searching and Data


Title:
METAL SILICIDE LAYER FORMING METHOD
Document Type and Number:
Japanese Patent JPH01179415
Kind Code:
A
Abstract:

PURPOSE: To obtain a heat-resisting wiring in which a high melting point silicide is used by a method wherein silicon ions are implanted using the kinetic energy with which the damage caused by ion irradiation on the interface of a metal- silicon substrate becomes 80% or more of the maximum quantity of damage, and then an annealing process is conducted.

CONSTITUTION: A titanium thin film 2 is deposited on a silicon substrate using a sputtering method, an amorphous layer 5 is formed by implanting silicon ions, and a stochiometric metal silicide layer is formed on the silicon substrate using a lamp-annealing device. At that time, silicon ions 1 are implanted using the kinetic energy with which the ion irradiation damage on the interface of the metal-silicon substrate becomes 80% or more of the maximum quantity of damage, and then an annealing process is conducted thereon. As a result, a heat-resisting wiring, in which high melting point silicide is used, can be obtained.


Inventors:
SONE KAZUHO
Application Number:
JP75488A
Publication Date:
July 17, 1989
Filing Date:
January 07, 1988
Export Citation:
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Assignee:
KAWASAKI STEEL CO
International Classes:
H01L21/28; H01L21/265; (IPC1-7): H01L21/265; H01L21/28
Attorney, Agent or Firm:
Akihide Sugimura (1 outside)