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Title:
METHOD OF CONTROLLING INTERNAL STRESS IN POLYCRYSTALLINE SILICON-GERMANIUM LAYER LAMINATED ON SUBSTRATE
Document Type and Number:
Japanese Patent JP2007165927
Kind Code:
A
Abstract:

To provide a method of controlling internal stress in a polycrystalline silicon-germanium layer laminated on a substrate.

The method of controlling internal stress in a polycrystalline silicon-germanium layer laminated on a substrate includes a step of selecting a range of internal stress in the silicon-germanium layer, a step of selecting evaporation pressure, and a step of evaporation temperature; and at least one of evaporation pressure and evaporation temperature is selected so that internal stress in the silicon-germanium layer becomes within the selected range.


Inventors:
FIORINI PAOLO
SEDKY SHERIF
CAYMAX MATTY
BAERT CHRISTIAAN
Application Number:
JP2007029141A
Publication Date:
June 28, 2007
Filing Date:
February 08, 2007
Export Citation:
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Assignee:
IMEC INTER UNI MICRO ELECTR
International Classes:
G01J1/02; H01L37/00; B81B3/00; B81C1/00; G01J5/20; H01L21/205; H01L31/0248; H01L31/09; H01L31/18
Domestic Patent References:
JPH1140824A1999-02-12
JPH08335707A1996-12-17
JPS63121851A1988-05-25
JPH07502812A1995-03-23
JPH08261832A1996-10-11
JPH0953980A1997-02-25
JPH08201177A1996-08-09
Attorney, Agent or Firm:
Takuji Yamada
Mitsuo Tanaka
Kawabata Junichi