Title:
METHOD AND EQUIPMENT FOR ADJUSTING REFERENCE VOLTAGE OF A/D CONVERTER
Document Type and Number:
Japanese Patent JPH06334522
Kind Code:
A
Abstract:
PURPOSE: To easily and optimally adjust the values of upper limit and lower limit reference voltages to be set in an A/D converter by user himself, without requiring a special device and to optimally A/D-convert only an original gradation part, even in an analog video signal provided with a blanking pedestal. CONSTITUTION: This device is constituted by providing lower limit and upper limit reference voltage adjusting circuits 10 and 12 for setting the lower limit and upper limit reference voltages of the A/D converter 4, where an analog video signal provided with a black level and a white level is inputted, an A/D output check circuit 14 for feeding-back a digital signal output from the A/D converter 4 and detecting the change point of time, when the level of the digital signal output is changed into the black level or the white level so as to output a detecting signal and a reference voltage adjustment control circuit 16 for supplying the upper limit and the lower limit reference voltages at the change point of time to the upper limit and the lower limit reference voltage adjusting circuit as the upper limit and lower limit reference voltage values according to the detecting signal.
Inventors:
YASUDA HIROAKI
INOUE KOJI
HAYATA MASAYUKI
INOUE KOJI
HAYATA MASAYUKI
Application Number:
JP11445093A
Publication Date:
December 02, 1994
Filing Date:
May 17, 1993
Export Citation:
Assignee:
IBM
International Classes:
H03M1/18; H04N5/14; (IPC1-7): H03M1/18; H04N5/14
Domestic Patent References:
| JPH02309784A | 1990-12-25 | |||
| JPS63257330A | 1988-10-25 | |||
| JPS5215684A | 1977-02-05 |
Attorney, Agent or Firm:
Koichi Tonmiya (4 outside)
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