Title:
METHOD FOR ERROR DIFFUSION PROCESSING OF DISPLAY
Document Type and Number:
Japanese Patent JP3785922
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a method for error diffusion processing of a display, capable of reducing image interferences, such as periodical pattern noise, etc., appearing in performing the error diffusion processings even though the luminance of a panel is advanced.
SOLUTION: In order to reducer, R, G and B signals having the first number of bits to the second number of the bits smaller than the first number of the bits, error data obtained by multiplying a prescribed error diffusion coefficient to the difference between the first number of the bits in each pixel element under consideration (dot under consideration P), consisting of the dots of the R, G and B signals and the second number of the bits is diffused to plural peripheral pixels, including a target (dots B, C and D) positioned at the rear of the pixel in consideration (the dot under consideration P) by at least one line. In this case, diffusion places of the R, G and B signals are made to differ from each other.
Inventors:
Shigehiro Masuchi
Application Number:
JP2000325671A
Publication Date:
June 14, 2006
Filing Date:
October 25, 2000
Export Citation:
Assignee:
Victor Company of Japan, Ltd.
International Classes:
G06T5/00; H04N1/52; G09G3/20; G09G3/28; G09G3/296; H04N1/405; H04N1/46; H04N9/64; (IPC1-7): H04N1/52; G06T5/00; G09G3/20; G09G3/28; H04N1/405; H04N1/46; H04N9/64
Domestic Patent References:
| JP7273990A | ||||
| JP10051638A | ||||
| JP8116459A |
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