METHOD OF MANUFACTURING BOTTOM-SURFACE ELECTRODE TYPE SOLID-STATE ELECTROLYTIC CAPACITOR, AND LEAD FRAME USED FOR THE SAME

Title:

METHOD OF MANUFACTURING BOTTOM-SURFACE ELECTRODE TYPE SOLID-STATE ELECTROLYTIC CAPACITOR, AND LEAD FRAME USED FOR THE SAME

Document Type and Number:

Japanese Patent JP2008109007

Kind Code:

A

Abstract:

To provide the method of manufacturing a bottom-surface electrode type solid-state electrolytic capacitor in which the volumetric efficiency of a capacitor element is improved, and to provide a lead frame used for the same.

A lead frame comprises a positive electrode terminal forming portion 21 and a negative electrode terminal forming portion 22 in which solder forming portions 24a and 24b are provided in such a manner that the solder forming portions cut across cut surfaces 23a and 23b exposed to the exterior side surfaces of the positive electrode side and the negative electrode side of a bottom-surface electrode type solid-state electrolytic capacitor. A fillet forming surface is provided on the exterior side surfaces of the positive electrode side and the negative electrode side by cutting at the cut surfaces 23a and 23b after molding the capacitor 11 connected to the lead frame with a coating resin 19 by using the lead frame.

Inventors:

OYA MASAKO
SHIMIZU KUNIHIKO
KATO KAZUYUKI

Application Number:

JP2006292225A

Publication Date:

May 08, 2008

Filing Date:

October 27, 2006

Export Citation:

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Assignee:

NEC TOKIN CORP

International Classes:

H01G9/15; H01G9/00; H01G9/004

Domestic Patent References:

JP2002170742A

2002-06-14

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