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Title:
METHOD FOR MANUFACTURING FIELD EFFECT TRANSISTOR USING STRAIN GROUP HETEROJUNCTION CRYSTAL
Document Type and Number:
Japanese Patent JP2004119536
Kind Code:
A
Abstract:

To make it possible to realize a required element characteristic by adopting a simple means even when the area size of a field effect transistor (FET) is such a small that the required element characteristic can not be realized as to an FET, using strain group heterojunction crystals formed as thickness exceeding critical film thickness by utilizing an area size effect.

A plurality of active element areas 1A-1D each of which consists of strain heterojunction crystals having an area exceeding the critical film thickness and limited by the frequency of dislocation generation by which influence on the operation of a transistor can be neglected are formed on a substrate, and a single field effect transistor having a large current and high mutual conductance and consisting of a plurality of small field effect transistors is formed by electrically connecting these active element areas 1A-1D.


Inventors:
HIKOSAKA YASUMI
Application Number:
JP2002278354A
Publication Date:
April 15, 2004
Filing Date:
September 25, 2002
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H01L29/812; H01L21/338; (IPC1-7): H01L21/338; H01L29/812
Attorney, Agent or Firm:
Manabe Kiyoshi
Shoji Kashiwaya
Koichi Watanabe
Toshiro Ito