To provide a method for forming a dielectric film between gates of a flash memory element capable of preventing a change in thickness of the dielectric film by suppressing a reaction between a floating gate and an oxide film.
The method for forming the dielectric film comprises the steps of forming a silicon film pattern making a floating gate, forming a silicon-fluorine coupling layer on the surface of the silicon film pattern in a fluorine-supplying atmosphere, forming a silicon-nitride coupling layer on the surface of the silicon film pattern by heat treating in a nitride atmosphere, forming a dielectric film including at least one-layer oxide film on the silicon film pattern having a silicon-nitride coupling layer, and forming a condutive film for forming a control gate on the dielectric film.
JP2005235987A | 2005-09-02 | |||
JPH08116059A | 1996-05-07 | |||
JP2001223282A | 2001-08-17 | |||
JP2004095918A | 2004-03-25 | |||
JP2001217218A | 2001-08-10 | |||
JP2000012806A | 2000-01-14 |
Hiroyuki Nakagawa
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