To provide a manufacturing method of a semiconductor device for manufacturing an insulating gate field effect transistor in which variations in a threshold have been reduced with a simple process.
The manufacturing method of the semiconductor device includes formation of: a first contact layer 36 to a support substrate 6 through a first impurity region 26a of the insulating gate field effect transistor 20; and a second contact layer 38 to a second impurity region 29b of the insulating gate field effect transistor 20. The formation of the first contact layer 36 and the second contact layer 38 includes formation of: a mask layer 50 having a first opening 52 and a second opening 54 that is smaller than the first opening 52 at the upper portion of an interlayer insulating layer 30; first etching with the mask layer 50 as a mask; and second etching having different conditions from those of the first etching.
| JPH11135799A | 1999-05-21 | |||
| JPH1041528A | 1998-02-13 | |||
| JPH07283414A | 1995-10-27 |
Mitsue Obuchi
Tatsuya Ina
Takekoshi Noboru
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