Title:
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2012146891
Kind Code:
A
Abstract:
To provide a method for manufacturing a semiconductor device, which is capable of forming a cavity with good controllability.
An offset spacer material layer is formed on a dummy gate electrode 22, and the offset spacer material layer is subjected to anisotropic etching to form an offset spacer 24 at a lower portion of a side wall of the dummy gate electrode 22. After formation of a sidewall 15, the dummy gate electrode 22 and the offset spacer 24 are removed, and a gate insulating film 13 made of a high dielectric constant material and a metal gate electrode 14 are formed using a highly anisotropic deposition method.
Inventors:
KIKUCHI YOSHIAKI
Application Number:
JP2011005523A
Publication Date:
August 02, 2012
Filing Date:
January 14, 2011
Export Citation:
Assignee:
SONY CORP
International Classes:
H01L29/78; H01L21/283; H01L21/336; H01L21/768; H01L21/8238; H01L23/532; H01L27/092; H01L29/423; H01L29/49
Attorney, Agent or Firm:
Shinto International Patent Office
Previous Patent: COIL WINDING DEVICE, AND COIL WINDING METHOD
Next Patent: METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
Next Patent: METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE