PURPOSE: To examine a logical operation error or a timing error generated due to power supply voltage variation by finding out the delay of logical element in a digital circuit part to be applied to a mix mode simulation while considering of the influence of the power supply voltage variation.

CONSTITUTION: Circuit level data 1 and logical level data 2 are inputted, a circuit described by a logical level is analyzed by a logical simulator 5 and a circuit described by a circuit level is analyzed by a circuit simulator 6. A synchronism control part 4 synchronizes both the simulators 5, 6 and a signal conversion part 7 mutually converts between a digital signal to be processed by the logical simulator 5 and an analog signal to be processed by the circuit simulator 6. A digital circuit current calculating part 8 calculates a power supply current for the digital circuit synchronously with logical simulation and a digital circuit delay calculating part 9 finds out delay varation generated due to power supply voltage variation based upon the calculated current value and a circuit simulation result.