Title:
多データ状態メモリセル
Document Type and Number:
Japanese Patent JP2005518671
Kind Code:
A
Abstract:
A programmable multiple data state memory cell including a first electrode layer formed from a first conductive material, a second electrode layer formed from a second conductive material, and a first layer of a metal-doped chalcogenide material disposed between the first and second electrode layers. The first layer providing a medium in which a conductive growth can be formed to electrically couple together the first and second electrode layers. The memory cell further includes a third electrode layer formed from a third conductive material, and a second layer of a metal-doped chalcogenide material disposed between the second and third electrode layers, the second layer providing a medium in which a conductive growth can be formed to electrically couple together the second and third electrode layers.
Inventors:
Terry El Guilton
Application Number:
JP2003572035A
Publication Date:
June 23, 2005
Filing Date:
February 05, 2003
Export Citation:
Assignee:
MICRON TECHNOLOGY,INCORPORATED
International Classes:
H01L27/105; G11C11/56; G11C17/14; H01L45/00; (IPC1-7): H01L27/10; H01L45/00
Domestic Patent References:
JP2001189431A | 2001-07-10 | |||
JP2000512058A | 2000-09-12 | |||
JP2001525606A | 2001-12-11 | |||
JP2001506426A | 2001-05-15 | |||
JP2002530850A | 2002-09-17 |
Foreign References:
WO2000048196A1 | 2000-08-17 |
Attorney, Agent or Firm:
Kosaku Sugimura
Kazuaki Takami
Hiroshi Tokunaga
Shiro Fujitani
Kiyoshi Kuruma
Kazuyuki Tomita
Kazuaki Takami
Hiroshi Tokunaga
Shiro Fujitani
Kiyoshi Kuruma
Kazuyuki Tomita