Title:
MULTI-LAYER PAPER SUBSTRATE FOR HOUSING BOARD OF CHIP-TYPE ELECTRONIC COMPONENT AND METHOD FOR PRODUCING THE SAME
Document Type and Number:
Japanese Patent JP2013159864
Kind Code:
A
Abstract:
To provide a multi-layer paper substrate for a housing board of a chip-type electronic component, which is used for forming a housing board that has cavities having short pitches therebetween, and can form the cavities with excellent precision therein.
The multi-layer paper substrate for the housing board of the chip-type electronic component contains 100 mm2 or less of an adhesive foreign matter per 100 g of a dried solid content, an inorganic filler, and 0.1-10 mass% of ash with respect to the dried solid content.
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Inventors:
FURUKAWA HIROYUKI
MOTOSUGI NAOYA
MANDO RITSUO
KAKIMI SHUNSUKE
WATANABE YASUHIRO
MOTOSUGI NAOYA
MANDO RITSUO
KAKIMI SHUNSUKE
WATANABE YASUHIRO
Application Number:
JP2012020202A
Publication Date:
August 19, 2013
Filing Date:
February 01, 2012
Export Citation:
Assignee:
OJI HOLDINGS CORP
OJI F TEX CO LTD
OJI F TEX CO LTD
International Classes:
D21H27/00; B65B15/04; B65D73/02; B65D85/38; B65D85/86; D21H11/14; D21H17/67
Domestic Patent References:
| JP2010030677A | 2010-02-12 | |||
| JP2009208819A | 2009-09-17 |
Attorney, Agent or Firm:
Masatake Shiga
Tadashi Takahashi
Suzuki Mitsuyoshi
Noriko Yanai
Tadashi Takahashi
Suzuki Mitsuyoshi
Noriko Yanai