Title:
MULTI-LAYER SUBSTRATE
Document Type and Number:
Japanese Patent JP2008159933
Kind Code:
A
Abstract:
To accomplish a high density mounting by making a mounting area larger, even though using a three-dimensional circuit substrate of a limited mounting area.
A multi-layer module 1, which is formed of a plurality of laminated three-dimensional circuit substrates 11, 21, 31, is composed in a manner such that the three-dimensional circuit substrates 11, 21, 31 are abutted when laminating them and have an extrusion of a first extruded electrode portion which keeps the electrical connection between the laminated three-dimensional circuit substrates, and each three-dimensional circuit substrates are bonded together each other by an adhesive filled around the extrusion of the first electrode portion.
Inventors:
SATO MASAHIRO
TATSUTA ATSUSHI
TATSUTA ATSUSHI
Application Number:
JP2006348402A
Publication Date:
July 10, 2008
Filing Date:
December 25, 2006
Export Citation:
Assignee:
MATSUSHITA ELECTRIC WORKS LTD
International Classes:
H05K1/14; H05K3/00
Domestic Patent References:
JP2002016340A | 2002-01-18 | |||
JPH11126980A | 1999-05-11 | |||
JPH06268151A | 1994-09-22 | |||
JP2000165045A | 2000-06-16 | |||
JPH0832183A | 1996-02-02 | |||
JPH10275965A | 1998-10-13 | |||
JP2001267490A | 2001-09-28 | |||
JPH07170077A | 1995-07-04 |
Attorney, Agent or Firm:
Hidekazu Miyoshi
Nakamura Tomoyuki
Masakazu Ito
Nakamura Tomoyuki
Masakazu Ito