To improve A/D conversion precision turning at least one of analog signal input terminals to a reference signal input terminal, selecting reference signals every time of the selection of respective analog signals, reducing the effect of the analog signal level of a previous channel and selecting the analog signals.

In the selection of the analog signals by address signal input, these respective multiplexers 31-3k select one analog signal, then select the reference signal once and select the analog signal of a new channel thereafter. The multiplexer 4 of a post stage defines the respective output signals of the multiplexers 31-3k as analog signal inputs, selects one of them corresponding to address signals and sends the output to an A/D converter 2. In this case, for the switching timing of the multiplexers, the reference signal is selected after the selection of the analog signal and thereafter, the new analog signal is selected. The level of the selected analog signal input becomes rise or fall from the level of the reference signal at all times and signal changeover from a fixed reference level is performed at all times.