Title:
MULTIPLYING CIRCUIT
Document Type and Number:
Japanese Patent JP2933112
Kind Code:
B2
Abstract:
PURPOSE: To provide the multiplying circuit which can execute multiplication of a small scale and high accuracy, and also, can execute highly accurate analog-to-digital multiplication.
CONSTITUTION: By setting a digital input voltage as a switching signal, whether an analog input voltage X is generated in an output terminal Tout or not is controlled, and with respect to digital input signals B0, B1, B2, B3, B4, B5, B6 and B7 of plural bits, plural multiplying circuits M0, M1, M2, M3, M4, M5, M6 and M7 are provided in parallel, outputs VOout, V1out, V2out, V3out, V4out, V5out, V6out and V7out of each multiplying circuit are integrated by capacity coupling CP, and in this capacity coupling, weight corresponding to weight of digital input voltages B0, B1, B2, B3, B4, B5, B6 and B7 of each multiplying circuit is given.
Inventors:
UIWATSUTO UONWARAUIPATSUTO
YO KOREYASU
KOTOBUKI KOKURYO
TAKATORI SUNAO
YAMAMOTO MAKOTO
YO KOREYASU
KOTOBUKI KOKURYO
TAKATORI SUNAO
YAMAMOTO MAKOTO
Application Number:
JP33000392A
Publication Date:
August 09, 1999
Filing Date:
November 16, 1992
Export Citation:
Assignee:
TAKATORI IKUEIKAI KK
SHAAPU KK
SHAAPU KK
International Classes:
G06G7/163; G06J1/00; (IPC1-7): G06G7/163; G06J1/00
Attorney, Agent or Firm:
Yamamoto Makoto
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