Title:
MULTIPROCESSOR SYSTEM
Document Type and Number:
Japanese Patent JPH06259385
Kind Code:
A
Abstract:
PURPOSE: To provide the multiprocessor which can easily decentralize the load and the function of a main processor.
CONSTITUTION: The multiprocessor consists of a main processor board 2, a memory board mount area 4, an input/output device adapter mount area 3, and a subprocessor board 5 mounted in a housing 1 and is constituted by mounting the subprocessor board 5 in the input/output device adapter mount area 3. Further, The bus of a main processor side system and the bus of a subprocessor side system are connected through a bus coupling controller which converts addresses and then the main processor and subprocessor can access the opposite memories mutually through their own local memory spaces.
Inventors:
KARASAKI SADAJI
INAGAWA TAKASHI
SAKANO KATSUYA
MURAMOTO NORIYASU
ADACHI SHIGEMI
INAGAWA TAKASHI
SAKANO KATSUYA
MURAMOTO NORIYASU
ADACHI SHIGEMI
Application Number:
JP4649693A
Publication Date:
September 16, 1994
Filing Date:
March 08, 1993
Export Citation:
Assignee:
HITACHI LTD
HITACHI CHUBU SOFTWARE KK
HITACHI CHUBU SOFTWARE KK
International Classes:
G06F13/36; G06F13/38; G06F15/16; G06F15/177; (IPC1-7): G06F15/16; G06F13/36; G06F13/38
Attorney, Agent or Firm:
Masatoshi Isomura