PURPOSE: To obtain a semiconductor structure micronized and enhanced in degree of integration by a method wherein contact holes are formed in a self- aligned manner keeping wirings minimal in pitch without using a lithography technique.
CONSTITUTION: A semiconductor device is provided, where an electrode wiring is made to serve as a word line of a DRAM memory cell, and a bit line electrode and an Si diffusion layer electrode are made to serve as an upper electrode and a lower electrode respectively. A wide region serves as a bit line contact BLC, or electrode wirings are made to serve as bit lines BL1 and BL2. Furthermore, the lower electrode layer of a capacitor is provided to an upper part, an Si diffusion electrode is provided to a lower part, and a wide region serves as SNC1 to SNC6. At least, a film buried on a center side is removed in a region where a distance between the same wiring layers is larger than a prescribed value. By this setup, a wiring space can be reduced to a minimum so as to enhance a semiconductor structure in degree of integration.
OZAKI TORU
CHIKUDAI SEIICHI
MORIKADO MUTSUO
NITAYAMA AKIHIRO
