Title:
SEMICONDUCTOR TEST DEVICE
Document Type and Number:
Japanese Patent JP2586308
Kind Code:
B2
Abstract:
PURPOSE: To electrically connect both surface mounting type and DIP type semiconductor devices to a measuring apparatus for electrical characteristics without using a harmful substance in a semiconductor test device.
CONSTITUTION: A laterally long recess 3 is provided on the surface of a carrier l, while a harmless low melting point metal 3b such as gallium which is solid at room temperature is injected into the recess 3. In a semiconductor device 4, an external lead 5a is fixed and held by the low melting point metal 3b and electrically connected to a measuring apparatus via the low melting point metal 3b and a wiring pattern. Since the harmless low melting point, metal is used, careful attention need not be paid no its handling, and also since the external. lead of the semiconductor device is received in the laterally long recess 3, the surface mounting type device can be measured as well as the DIP type device.
Inventors:
ARAI MASARU
Application Number:
JP26742793A
Publication Date:
February 26, 1997
Filing Date:
October 26, 1993
Export Citation:
Assignee:
NIPPON ELECTRIC CO
International Classes:
G01R1/06; H01L21/66; G01R31/26; H05K3/34; (IPC1-7): G01R31/26; G01R1/06; H01L21/66
Domestic Patent References:
| JP5102256A | ||||
| JP3241851A | ||||
| JP59111341A | ||||
| JP598281A | ||||
| JP63141471U | ||||
| JP170351U | ||||
| JP385679U |
Attorney, Agent or Firm:
Sugano Naka
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