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Title:
PROBE CARD AND TESTER EMPLOYING IT
Document Type and Number:
Japanese Patent JPH0720150
Kind Code:
A
Abstract:

PURPOSE: To allow simultaneously test for individual wafer or a plurality of chips at a time by connecting wire members, at one ends thereof, with pads formed on a substrate at positions corresponding to a plurality or all semiconductor chips on the wafer and exposing the wire members, at the other ends, to form resilient members.

CONSTITUTION: A probe card 21 is constituted such that gold wires 24 are connected, at one ends thereof, with pads 23 formed on a substrate 22 at positions corresponding to a plurality or all bumps 41 of a semiconductor chip 40 formed on a wafer 33 and the spherical end parts 24a of the gold wires 24 are exposed to form a rubber 25. The end parts 24a of gold wires 24 are positioned for the bumps 41 of all semiconductor chips 40 formed on the wafer 33 and the temperature cycle test is conducted simultaneously for all semiconductor chips 40.


Inventors:
TAMAKI KYOHEI
IIJIMA NOBUO
ONO TAKAO
Application Number:
JP16284293A
Publication Date:
January 24, 1995
Filing Date:
June 30, 1993
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G01R1/073; G01R31/26; H01L21/66; (IPC1-7): G01R1/073; G01R31/26; H01L21/66
Attorney, Agent or Firm:
Tadahiko Ito



 
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