PURPOSE: To facilitate addition and alteration by putting a logic circuit diagram connection information extraction device and a format conversion device for respective verification devices for processing from the generation of logic circuit diagram data to the generation of input data for the respective verification devices.

CONSTITUTION: The logic circuit diagram connection information extraction device 5 generates a logic circuit diagram connection information file 8 based upon a property definition file 6 and a character quantity definition file 7 by using logic circuit diagram data 4 inputted by a logic circuit diagram input device 1. The verification devices 9-1-9-3 generate the input data 10-1-10-3 for the verification devices by using the logic circuit diagram connection information file 8. The property definition file 6 contains information extracted from the logic circuit diagram data 4 and data on the definition of a format. The character quantity definition file 7 contains data defining the maximum number of characters of information extracted from the logic circuit diagram data 4. Consequently, a logic circuit input device can easily be altered and the verification devices can easily be added or altered.