Title:
ノイズ除去方法
Document Type and Number:
Japanese Patent JP7379801
Kind Code:
B2
Abstract:
To reject the noise included in an input while suppressing a change of an output in an input/output system that produces an output for an input.SOLUTION: A noise rejection device 100 calculates the output candidate vector {ao} that is outputted when an input candidate vector {ai} is inputted to an input/output system F and calculates an error vector {r} between a target vector {atar} and the output candidate vector {ao}. The noise rejection device 100 selects a high-order mode matrix [VR] that corresponds to a high-order mode from the matrix decomposition result of partial differential matrix [K] of the error vector {r}, calculates a component vector {k} and calculates a correction vector {Δai}. The noise rejection device 100 subtracts the correction vector {Δai} from the input candidate vector {ai} and calculates a new input candidate vector {ai}new. The noise rejection device 100 acquires the input candidate vector {ai} when a repetition condition is satisfied, as a noise-rejected input vector.SELECTED DRAWING: Figure 1
Inventors:
鈴木 ▲琢▼也
Application Number:
JP2019230570A
Publication Date:
November 15, 2023
Filing Date:
December 20, 2019
Export Citation:
Assignee:
TAKENAKA CORPORATION
International Classes:
G01V1/30
Domestic Patent References:
| JP2019194827A | ||||
| JP2016211940A | ||||
| JP2004069598A |
Foreign References:
| US20120232861 |
Attorney, Agent or Firm:
Kazunobu Kato
Hiroshi Fukuda
Hiroshi Fukuda