Title:
NON-VOLATILE SEMICONDUCTOR MEMORY AND ITS CONTROL METHOD
Document Type and Number:
Japanese Patent JP3827066
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To shorten a programming time of a flash memory.
SOLUTION: This device has a boosting circuit 130 generating higher voltage than external power source voltage, reference voltage generating circuits 131, 134, and a selecting circuit 139 selecting either of reference voltage 136, 137 and supplying it to the boosting circuit 130. At the same time program operation is started, the selecting circuit 139 selects an output 136 of the first reference voltage generating circuit of which rise is fast and couples to the boosting circuit 130, while activates both reference voltage generating circuits 131, 134. And boosting operation of the boosting circuit 130 is started at the point of time at which an output of the first reference voltage generating circuit 134 is stabilized. After that, the selecting circuit 139 selects an output of the second reference voltage generating circuit 131 and supplies stable voltage to the boosting circuit 130 at the point of time at which an output of the boosting circuit is stabilized.
Inventors:
Nawaki Masaru
Application Number:
JP2001045820A
Publication Date:
September 27, 2006
Filing Date:
February 21, 2001
Export Citation:
Assignee:
Sharp Corporation
International Classes:
G11C16/06; G11C16/02; (IPC1-7): G11C16/06; G11C16/02
Domestic Patent References:
| JP11317089A | ||||
| JP11288588A | ||||
| JP3290895A | ||||
| JP2000056843A | ||||
| JP2000091505A |
Attorney, Agent or Firm:
Hidesaku Yamamoto
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