Title:
不揮発性記憶装置及び不揮発性記憶装置のプログラム方法
Document Type and Number:
Japanese Patent JP6994296
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To reduce a circuit area of a non-volatile storage device.SOLUTION: A non-volatile storage device 10 comprises memory transistors 11, 12. The memory transistor 11 is turned on based on a first voltage supplied to a gate, and outputs an output voltage which is based on a power source voltage VSS supplied to one of the source and the drain from the other source and the drains. The memory transistor 12 is a conductive type same as that of the memory transistor 11, and one of the source and drain is connected to the other of the source and the drain of the memory transistor 11. The memory transistor 12 is programmed to be turned off when a power source voltage VDD is supplied to the other of the source and the drain and the first voltage is supplied to the gate.SELECTED DRAWING: Figure 1
Inventors:
Makoto Yasuda
Atsushi Takeuchi
Tadashi Ema
Atsushi Takeuchi
Tadashi Ema
Application Number:
JP2016162756A
Publication Date:
January 14, 2022
Filing Date:
August 23, 2016
Export Citation:
Assignee:
United Semiconductor Japan Co., Ltd.
International Classes:
G11C16/04; G11C16/10; H01L21/336; H01L27/115; H01L29/788; H01L29/792
Domestic Patent References:
| JP11345496A | ||||
| JP200877727A | ||||
| JP201523177A |
Attorney, Agent or Firm:
Fuso International Patent Office
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