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Title:
NONVOLATILE SEMICONDUCTOR STORAGE DEVICE
Document Type and Number:
Japanese Patent JP3910936
Kind Code:
B2
Abstract:

PROBLEM TO BE SOLVED: To provide an improved nonvolatile semiconductor storage device.
SOLUTION: A memory cell array (30) in which a plurality of electrically rewritable memory cells for storing three or more values are arranged in a matrix, a plurality of bit lines (31) for transmitting data to and receiving data from the memory cells, a plurality of sense amplifiers (32) for sensing the electric potential of the bit lines, a plurality of data latches (33) for holding the data to be written to the memory cells, and a plurality of verify means (34) for checking whether the writing of the data to the memory cells is successful or not are provided. The datum of the plurality of data latch circuits is one of the plurality of data for controlling the state of the memory cells to change from the state before the writing operation. Each of the plurality of data for controlling the state of the memory cells to change from the state before the writing operation includes the humming distance of 1, with respect to the data for the controlling the state of the memory cells to hold as before the writing operation.


Inventors:
Kazunori Ouchi
Tomoharu Tanaka
Hemink Gertoyan
Application Number:
JP2003139074A
Publication Date:
April 25, 2007
Filing Date:
March 09, 1995
Export Citation:
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Assignee:
Toshiba Corporation
International Classes:
G11C16/02; G11C16/06; G11C16/04; (IPC1-7): G11C16/02; G11C16/04; G11C16/06
Domestic Patent References:
JP4057294A
JP4507320A
JP6195987A
Attorney, Agent or Firm:
Takehiko Suzue
Satoshi Kono
Makoto Nakamura
Kurata Masatoshi
Sadao Muramatsu
Ryo Hashimoto