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Patent Searching and Data


Title:
OPERATION DETECTOR
Document Type and Number:
Japanese Patent JPH04115174
Kind Code:
A
Abstract:

PURPOSE: To ensure high speed operation and to achieve cost reduction and operational stability by preliminarily incorporating a detector in a semiconductor device and measuring the input timing of data by a low speed tester.

CONSTITUTION: A data signal input terminal 1 is successively connected to the inverters 6, 7, 8, 9 of a delay circuit 3 and the output from the circuit 3 is connected to the signal input terminal of a data holding circuit 4. When the devices constituting the circuit 3 are almost uniformly arranged, the high speed operation of a semiconductor device can be judged from the positive correlation of high speed operation and a delay time. By inputting the output of the circuit 3 to the circuit 4, the judgment of delay can be performed only by adjusting input timing and it is unnecessary to judge the output of the circuit 4 within a real time and, further, the input timing of data can be measured by a low speed tester. By preliminarily incorporating a detector in the semiconductor device and using the low speed tester, high speed operation can be ensured and cost reduction and operational stability can be achieved.


Inventors:
TAKAGI TOSHIHITO
Application Number:
JP23472190A
Publication Date:
April 16, 1992
Filing Date:
September 05, 1990
Export Citation:
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Assignee:
SEIKO EPSON CORP
International Classes:
G01R31/28; G01R31/26; (IPC1-7): G01R31/26; G01R31/28
Attorney, Agent or Firm:
Kisaburo Suzuki (1 outside)