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Title:
OPERATIONAL AMPLIFIER CIRCUIT AND INTEGRATOR
Document Type and Number:
Japanese Patent JP2006166076
Kind Code:
A
Abstract:

To provide a voltage/current conversion circuit in which an input offset voltage is small and linearity to the input voltage of a large amplitude is excellent.

An integrator is constituted of: an operational amplification part 1 provided with an inverted input terminal, a grounded noninverted input terminal and an output terminal for amplifying and outputting the difference voltage of input signals to the respective input terminals, for which the output terminal is connected to the inverted input terminal by a connection path 1a; an αI circuit 2 for outputting a current proportional to an output current I outputted from the output terminal of the operational amplification part 1 to the connection path 1a to the outside; an input resistor R3; and a capacitor C3. An input terminal 3 is connected through the input resistor R3 to the inverted input terminal of the operational amplification part 1. The αI circuit 2 outputs the current i which is α times of the output current I flowing to the connection path 1a to the output terminal 4 of the integrator. The operational amplification part 1 and the αI circuit 2 are constituted as an integrated semiconductor integrated circuit, and only one external terminal 5 for externally attaching the capacitor C3 is provided.


Inventors:
YAMADA KOHEI
Application Number:
JP2004355206A
Publication Date:
June 22, 2006
Filing Date:
December 08, 2004
Export Citation:
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Assignee:
FUJI ELECTRIC HOLDINGS
International Classes:
H03F3/34; H03F3/45
Domestic Patent References:
JPS63138806A1988-06-10
JP2003060453A2003-02-28
JPH11154833A1999-06-08
JPH08242130A1996-09-17
JPH09331363A1997-12-22
JP2002026666A2002-01-25
Attorney, Agent or Firm:
Takeshi Hattori



 
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