Title:
発振器回路
Document Type and Number:
Japanese Patent JP3138669
Kind Code:
U
Abstract:
A comparator with a fixed reference voltage (self bias) for an oscillator is disclosed. The comparator includes: a depletion MOS network to form a source current, wherein the gate and the source has a connection; and an enhanced MOS transistor, wherein the drain or the source connects with the depletion MOS transistor in series. The gate of the enhanced MOS transistor receives an input voltage when the input voltage is lower than the reference voltage, and the comparator outputs a high level voltage, or the enhanced MOS transistor outputs a low level voltage if the input voltage is higher then the reference voltage. Moreover, the oscillator's comparator has a reference voltage that is independent from temperature and supply voltage source.
Inventors:
Wu
Kure Tetsumei
Kure Tetsumei
Application Number:
JP2007008295U
Publication Date:
January 17, 2008
Filing Date:
October 29, 2007
Export Citation:
Assignee:
Tenji Electronics Co., Ltd.
International Classes:
H03K4/501; H03K5/08; H03L7/093
Attorney, Agent or Firm:
Akihiro Ryuka
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