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Title:
OVERCURRENT PREVENTION CIRCUIT FOR POWER AMPLIFIER
Document Type and Number:
Japanese Patent JPH03184405
Kind Code:
A
Abstract:

PURPOSE: To surely prevent overcurrent occurring by varying the voltage of the base terminal of a bipolar transistor by operating a photocoupler with the voltage drop of a resistor according to the overcurrent of the FET of an amplifier element, and controlling a current between the collector and emitter of the bipolar transistor.

CONSTITUTION: When the overcurrent flows from a positive power source supply terminal 12 to the drian of the FET 1 comprising a high frequency power amplifier due to the fault of the FET, large voltage drop occurs at the resistor 4, and the current flows on the diode part 7 of the photocoupler 6, which emits light, and a transistor part 8 is turned on, and the current flows from the positive power source supply terminal 12 via the transistor part 8 and the resistor 10, and the voltage equivalent to the voltage drop of the resistor 10 is applied to the base terminal of a PNP bipolar transistor 5 passing the resistor 9. The resistors 9 and 10 are set so as to permit the base current of the transistor 5 to flow as the ordinary current in use of the FET 1, however, the potential of the connecting point of the resistors 9 and 10 is increased by setting the transistor part 8 at an energized state, and the current flowing between the collector and emitter of the transistor 5 can be suppressed, which prevents the overcurrent occurring.


Inventors:
KANEKO TOMOYA
Application Number:
JP32258189A
Publication Date:
August 12, 1991
Filing Date:
December 14, 1989
Export Citation:
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Assignee:
NEC CORP
International Classes:
H03F1/52; (IPC1-7): H03F1/52
Attorney, Agent or Firm:
Suzuki Akio



 
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