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Title:
PACKAGE METHOD FOR PULSE GENERATOR
Document Type and Number:
Japanese Patent JPS5448165
Kind Code:
A
Abstract:

PURPOSE: To obtain the steady frequency output over a wide range through a simple way by giving the digital code setting to the steady oscillator circuit output through the program divider circuit.

CONSTITUTION: Reference oscillator circuit 9 which has oscillations with a constant frequency is incorporated, along with plural pairs of counters 18W24 which divide the output of circuit 9 or the signals produced by dividing the output of circuit 9 plus control circuit 25 which controls the structures of counters 18W24. The program signals which are digital-encoded are supplied to circuit 25 to control the above mentioned counters, thus ensuring a selective setting for the counter output frequency. Now, circuit 9, the plural pairs of counters and circuit 25 are gathered together onto one chip to form an IC. This IC is then enclosed into the dual on-line type plastic package containing the concavity partially, and piezoelectric oscillator 56 featuring the steady oscillations under a large atmospheric pressureis inserted into the concavity to be used as the oscillator of circuit 9


Inventors:
MITSUYOSHI YOSHITERU
HOSOKAWA MINORU
SHIBATA MAKOTO
Application Number:
JP11445277A
Publication Date:
April 16, 1979
Filing Date:
September 22, 1977
Export Citation:
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Assignee:
SUWA SEIKOSHA KK
International Classes:
G04G3/00; G04F5/00; H01L23/00; H01L23/04; H01L23/12; H01L23/50; H03K3/72; H03K21/00; (IPC1-7): G04F5/00; H01L23/00; H01L23/04; H01L23/12; H01L23/50; H03K3/72; H03K21/00



 
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