Title:
入力と出力が分離された、パッケージングされたトランジスタ・デバイス、及び入力と出力が分離された、パッケージングされたトランジスタ・デバイスを形成する方法
Document Type and Number:
Japanese Patent JP7382405
Kind Code:
B2
Abstract:
Packaged transistor devices are provided that include a transistor on a base of the packaged transistor device, the transistor comprising a control terminal and an output terminal, a first bond wire electrically coupled between an input lead and the control terminal of the transistor, a second bond wire electrically coupled between an output lead and the output terminal of the transistor, and an isolation material that is and physically between the first bond wire and the second bond wire, wherein the isolation material is configured to reduce a coupling between the first bond wire and the second bond wire.
Inventors:
Tran, Frank
Jean, Heddon
Mokuti, Zurazumi
Jean, Heddon
Mokuti, Zurazumi
Application Number:
JP2021531735A
Publication Date:
November 16, 2023
Filing Date:
December 02, 2019
Export Citation:
Assignee:
WOLFSPEED,INC.
International Classes:
H01L23/00; H01L21/60; H01L25/00
Domestic Patent References:
| JP1107141U | ||||
| JP2003115732A | ||||
| JP5505915B1 | ||||
| JP2017212287A |
Foreign References:
| WO2018078686A1 | ||||
| WO2016181954A1 | ||||
| US5825042 |
Attorney, Agent or Firm:
Patent Attorney Corporation Asamura Patent Office