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Title:
PARTIAL REFRESH OF SEMICONDUCTOR MEMORY DEVICE
Document Type and Number:
Japanese Patent JP2004227624
Kind Code:
A
Abstract:

To provide a technique capable of reducing power consumption caused by a refresh operation of a semiconductor memory device.

This semiconductor memory device is provided with a refresh control part for performing a refresh operation of a memory cell array having dynamic memory cells. The refresh control part is provided with a target memory cell group setting part for setting a portion of the target memory cell group in the memory cell array, a refresh address generating part for sequentially generating a plurality of refresh addresses that can designate all memory cells in the memory cell array, and a refresh address determining part for determining whether an attention refresh address designates the target memory cell group. When it is determined that the attention refresh address designates the target memory cell group, a refresh operation is carried out on the basis of the attention refresh address.


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Inventors:
MIZUGAKI KOICHI
Application Number:
JP2003011258A
Publication Date:
August 12, 2004
Filing Date:
January 20, 2003
Export Citation:
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Assignee:
SEIKO EPSON CORP
International Classes:
G11C11/406; G11C11/403; (IPC1-7): G11C11/406; G11C11/403
Attorney, Agent or Firm:
Meisei International Patent Office