PURPOSE: To speed up a response by a phase variation quantity and a phase variation direction which are obtained by presetting the number of clock pulses at the time when there is no phase variation to a period counter as a reference value, and subtracting the clock pulse at every one period of an input signal.

CONSTITUTION: By presetting the number of clock pulses in one period at the time when there is no phase variation of a signal to be detected to a period counter 38 as a reference value, and subtracting the reference value during one period of the signal to be detected, a phase variation quantity is obtained as a counter remaining value of the counter 38. From positive and negative of a result of subtraction obtained by each circuit 40W46 of a phase variation quantity register, '0' decision, positive/ negative decision, sending control, AND, complement generation and OR, to which direction of the positive or negative direction the phase has been varied is decided, and a direction signal is outputted. Simultaneously, a data signal for showing the result of subtraction is outputted, and also, a data effective signal for showing a fact tat a measurement of one period is ended and a data has been outputted is outputted, therefore, even if the speed of the phase variation is increased, it is possible to follow up. Also, since the data effective signal which can be utilized as an interruption signal to a data processor is outputted, the connection to the data processor is executed easily.