PHASE LOCKED LOOP CIRCUIT - JAPAN RADIO CO LTD

Title:

PHASE LOCKED LOOP CIRCUIT

Document Type and Number:

Japanese Patent JPH01286523

Kind Code:

A

Abstract:

PURPOSE: To form a circuit constituting a phase locked loop(PLL) into a simple circuit totally together with a power circuit by employing an operational amplifier used by a single power voltage.

CONSTITUTION: An output of a phase comparator comprising 1st, 2nd flip-flops 1, 2 and a NAND gate 3 is outputted around a +Vcc1/2 as a center and the output is given to an operational amplifier 4. A negative power terminal of the operational amplifier 4 whose inverting input voltage changes around the +Vcc1/2 and whose noninverting input voltage is fixed to the +Vcc1/2 is connected to ground, the power supply of the operational amplifier 4 is enough to be of single power voltage +Vcc2, and the relation of +Vcc2=+Vcc1 exists. Thus, the constitution of the PLL circuit is simplified.

Inventors:

YAMABAYASHI MASAAKI

Application Number:

JP11457188A

Publication Date:

November 17, 1989

Filing Date:

May 13, 1988

Export Citation:

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Assignee:

JAPAN RADIO CO LTD

International Classes:

H03L7/093; H03L7/08; (IPC1-7): H03L7/08

Attorney, Agent or Firm:

Yuji Takahashi (1 person outside)

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