PURPOSE: To latch a horizontal synchronizing signal to a divided picture element clock always at optimum timing without shifting it, to exclude operational delay caused by temperature dependency and to provide high-definition images.

CONSTITUTION: This device is provided with a VCO 305 for outputting plural signals such as reference clocks, phase selection circuit 307 for selecting one phase signal from inverted/non-inverted outputs after respective output signals are latched, adder circuit 308 for shifting the selected phase signal and outputting it as a phase signal for phase comparison, D flip-flop 310 for storing the phase signal at the change point of the horizontal synchronizing signal, and phase comparator 303 for comparing the phase signal, which is synchronized with the edge of the horizontal synchronizing signal synchronizing an output edge at the specified step of the VCO 305, with the reference clock.