PICTURE OUTPUT CONVERTER

Japanese Patent JPS6257072

A

PURPOSE:To attain highly efficient picture output by providing two interface buffers on a multi-data bus line so as to apply multi-control by the changeover management of the bus line thereby expanding the processing capability. CONSTITUTION:When a multi-control command is received from a device control section 8, a picture data output control circuit 11 gives each start timing signal to a picture data input circuit 15, a picture data edition circuit 18 and a picture emphasis circuit 17 to apply and advanced edit to the next line. Thus, the data edited and processed in this way is stored in an interface buffer 21 via an addressed data bus line. On the other hand, when a prescribed DMA transfer is finished, the control section 8 returns a data transfer end signal from a DMA controller 13 to the circuit 11. Then a bus line changeover command of the buffer 21 is issued to a data bus line changeover circuit 20 form the next line output and issues a next line output request signal to the control section 8. A film latent image with high efficiency is attained by applying the advanced edit of the next line in this way.

SUDA KATSUYUKI

JP19591985A

March 12, 1987

September 06, 1985

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HITACHI LTD
HITACHI ENG CO LTD

G06T11/80; (IPC1-7): G06F15/62

Katsuo Ogawa

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