PURPOSE: To synthesize video data without destruction by selecting the 1st video signal on the synthesized side when a data not actually used appears in the 2nd video signal on a synthesizing side and selecting the 2nd video signal on the synthesizing side in other cases.
CONSTITUTION: When a picture data on the synthesizing side and the synthesized side is set, a processor 57 outputs an address signal set to a 2nd memory bank 59 to a timing controller 51 to replace a memory content for non-synthesis data in the 2nd memory bank 59 into zero thereby replacing the content of the 2nd memory bank 59. When the processing above is finished, two synchronizing digital video data are inputted to a 2nd stage internal selector 56b in the data selector 56, and when a data of the 2nd memory bank 59 is zero, a data of the 1st memory bank 58 is selected, and when the output of the 2nd memory bank 59 is not zero, the video data of the 2nd memory bank 59 is selected and outputted to a D/A converter 60.
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OTA YOSHITAKA
NAGAISHI KATSUYA
