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Patent Searching and Data


Title:
PLL CIRCUIT FOR FM STEREOPHONIC DEMODULATION
Document Type and Number:
Japanese Patent JPH03224326
Kind Code:
A
Abstract:

PURPOSE: To stably perform stereophonic demodulation by passing a subcarrier signal component receiving the influence of frequency fluctuation obtained by a PLL circuit through a PLL circuit with low responsiveness as a PLL in which a crystal oscillator is used as an oscillator.

CONSTITUTION: Since a CR type oscillation circuit is used in a VCO 23 comprising the PLL circuit 2, the subcarrier signal component receiving the influence of the frequency fluctuation is outputted from a frequency divider 3. To eliminate the influence of the frequency fluctuation, the PLL circuit 5 using the crystal oscillator is provided at the output side of the frequency divider 3. A phase comparator 51 performs the phase comparison of the frequency division output of the frequency divider 3 with an oscillation signal from the crystal oscillator 52, and sends out a phase difference signal to a low-pass filter 53. The low-pass filter 53 takes out the constant area component of the phase difference signal sent from the phase comparator 51, and supplies it to an oscillation controller 52 as the oscillation frequency control signal of the oscillation controller 52.


Inventors:
KAWABATA HIROSHI
Application Number:
JP1780490A
Publication Date:
October 03, 1991
Filing Date:
January 30, 1990
Export Citation:
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Assignee:
KENWOOD CORP
International Classes:
H03L7/087; H04H40/54; H04H1/00; (IPC1-7): H03L7/087; H04H5/00
Attorney, Agent or Firm:
Masahiro Fukuyama