Title:
POINTER PROCESSING CIRCUIT
Document Type and Number:
Japanese Patent JP2725486
Kind Code:
B2
Abstract:
PURPOSE: To decrease the circuit scale by using a phase counter and a phase control circuit for a common phase counter to each phase.
CONSTITUTION: The processing circuit is provided with a phase control circuit 2 in succession to a phase counter 1, and a pointer offset for positive stuff and negative stuff is generated for a pointer offset at the time of non-stuff, and any of three pointer offsets is selected depending on the stuff state for each channel signal, and the selected pointer offset is compared with a comparison pointer to implement the pointer processing.
Inventors:
KANEKO HIROAKI
Application Number:
JP18527491A
Publication Date:
March 11, 1998
Filing Date:
June 28, 1991
Export Citation:
Assignee:
NIPPON DENKI KK
International Classes:
H04J3/00; H04J3/06; H04J3/07; H04L7/08; (IPC1-7): H04J3/00; H04J3/07; H04L7/08
Domestic Patent References:
| JP4326219A |
Attorney, Agent or Firm:
Naotaka Ide
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